View ADA4310-1ARHZ-R7_1388642.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

low cost, dual, high current output line driver with shutdown ada4310-1 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006 analog devices, inc. all rights reserved. features high speed ?3 db bandwidth: 190 mhz, g = +5 slew rate: 820 v/s, r load = 50 wide output swing 20.4 v p-p differential, r load of 100 from 12 v supply high output current low distortion ?95 dbc typical at 1 mhz, v out = 2 v p-p, g = +5, r load = 50 ?69 dbc typical at 10 mhz, v out = 2 v p-p, g = +5, r load = 50 power management and shutdown control inputs cmos level compatible shutdown quiescent curr ent 0.65 ma/amplifier adjustable low quiescent curren t: 3.9 ma to 7.6 ma per amp applications home networking line drivers twisted pair line drivers power line communications video line drivers arb line drivers i/q channel amplifiers pin configurations nc = no connect +v s 1 nc 2 out a 3 ?in a 4 +in a 5 out b 10 ?in b 9 +in b 8 pd1 7 pd0 6 06027-001 figure 1. thermally enhanced, 10-lead mini_so_ep nc = no connect 1 nc 2 ? in a 3 +in a 4 gnd 11 ? in b 12 nc 10 +in b 9pd1 5 n c 6 n c 7 ? v s 8 p d 0 1 5 n c 1 6 o u t a 1 4 + v s 1 3 o u t b 06027-002 figure 2. thermally enhanced, 4 mm 4 mm 16-lead lfcsp_vq general description the ada4310-1 is comprised of two high speed, current feedback operational amplifiers. the high output current, high bandwidth, and fast slew rate make it an excellent choice for broadband applications requiring high linearity performance while driving low impedance loads. the ada4310-1 incorporates a power management function that provides shutdown capabilities and/or the ability to optimize the amplifiers quiescent current. the cmos- compatible, power-down control pins (pd1 and pd0) enable the ada4310-1 to operate in four different modes: full power, medium power, low power, and complete power down. in the power-down mode, quiescent current drops to only 0.65 ma/amplifier, while the amplifier output goes to a high impedance state. the ada4310-1 is available in a thermally enhanced, 10-lead msop with an exposed paddle for improved thermal conduction and in a thermally enhanced, 4 mm 4 mm 16-lead lfcsp. the ada4310-1 is rated to work in the extended industrial temperature range of ?40c to +85c. 06027-003 v mid 1 ada4310-1 ada4310-1 1/2 1/2 1 v mid = v cc ? v ee 2 figure 3. typical plc driver application
ada4310-1 rev. 0 | page 2 of 16 table of contents features .............................................................................................. 1 applications....................................................................................... 1 pin configurations ........................................................................... 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications..................................................................................... 3 absolute maximum ratings............................................................ 5 thermal resistance ...................................................................... 5 esd caution.................................................................................. 5 pin configurations and function descriptions ........................... 6 typical performance characteristics ............................................. 7 theory of operation ...................................................................... 10 application information................................................................ 11 feedback resistor selection...................................................... 11 power control modes of operation ........................................ 11 exposed thermal pad connections ........................................ 11 power line application ............................................................. 11 board layout............................................................................... 12 power supply bypassing ............................................................ 12 outline dimensions ....................................................................... 13 ordering guide .......................................................................... 13 revision history 10 /06revision 0: initial version
ada4310-1 rev. 0 | page 3 of 16 specifications v s = 12 v, 6 v (@ t a = 25c, g = +5, r l = 100 , unless otherwise noted). table 1. parameter test conditions/comments min typ max unit dynamic performance ?3 db bandwidth g = +5, v out = 0.1 v p-p, pd1 = 0, pd0 = 0 190 mhz pd1 = 0, pd0 = 1 140 mhz pd1 = 1, pd0 = 0 100 mhz slew rate g = +5, v out = 2 v p-p, r load = 50 , pd1 = 0, pd0 = 0 820 v/s pd1 = 0, pd0 = 1 790 v/s pd1 = 1, pd0 = 0 750 v/s noise/distortion performance distortion (worst harmonic) f c = 1 mhz, v out = 2 v p-p, r load = 50 pd1 = 0, pd0 = 0 ?95 dbc pd1 = 0, pd0 = 1 ?88 dbc pd1 = 1, pd0 = 0 ?77 dbc f c = 10 mhz, v out = 2 v p-p, r load = 50 pd1 = 0, pd0 = 0 ?69 dbc pd1 = 0, pd0 = 1 ?57 dbc pd1 = 1, pd0 = 0 ?47 dbc f c = 20 mhz, v out = 2 v p-p, r load = 50 pd1 = 0, pd0 = 0 ?50 dbc pd1 = 0, pd0 = 1 ?42 dbc pd1 = 1, pd0 = 0 ?35 dbc input voltage noise f = 100 khz 2.85 nv/hz input current noise f = 100 khz 21.8 pa/hz dc performance input offset voltage 1 mv input bias current noninverting input ?2 a inverting input 6 a open-loop transimpedance r load = 50 14 m r load = 100 35 m common-mode rejection ?62 db input characteristics input resistance f < 100 khz 500 k output characteristics single-ended +swing r load = 50 +5.08 v p single-ended ?swing r load = 50 ?5.12 v p single-ended +swing r load = 100 +5.14 v p single-ended ?swing r load = 100 ?5.17 v p differential swing r load = 100 20.4 v p-p power supply operating range (dual supply) 2.5 6 v operating range (single supply) +5 +12 v supply current pd1 = 0, pd0 = 0 7.6 ma/amp pd1 = 0, pd0 = 1 5.6 ma/amp pd1 = 1, pd0 = 0 3.9 ma/amp pd1 = 1, pd0 = 1 0.65 ma/amp
ada4310-1 rev. 0 | page 4 of 16 parameter test conditions/comments min typ max unit power down pins pd1, pd0 threshold referenced to gnd 1.5 v pd1, pd0 = 0 pin bias current pd1 or pd0 = 0 v ?0.2 a pd1, pd0 = 1 pin bias current pd1 or pd0 = 3 v 70 a enable/disable time 0.04/2 s power supply rejection ratio positive/negative ?70/?60 db
ada4310-1 rev. 0 | page 5 of 16 absolute maximum ratings table 2. parameter rating supply voltage 10-lead mini_so_ep 12 v 16-lead lfcsp_vq 6v power dissipation (t jmax ? t a )/ ja storage temperature range ?65c to +125c operating temperature range ?40c to +85c lead temperature (soldering 10 sec) 300c junction temperature 150c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst-case conditions, that is, ja is specified for device soldered in circuit board for surface-mount packages. table 3. package type ja unit 10-lead mini_so_ep 44 c/w 16-lead lfcsp_vq 63 c/w maximum power dissipation the maximum safe power dissipation for the ada4310-1 is limited by the associated rise in junction temperature (t j ) on the die. at approximately 150 c, which is the glass transition temperature, the plastic changes its properties. even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the amplifiers. exceeding a junction temperature of 150c for an extended period can result in changes in silicon devices, potentially causing degradation or loss of functionality. figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 10-lead mini_so_ep (44c/w) and for the 16-lead lfcsp_vq (63c/w) on a jedec standard 4-layer board. ja values are approximations. ambient temperature (c) maximum power dissipation (w) 06027-016 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 ?35 ?15 5 25 45 65 85 lfcsp_vq-16 mini_so_ep-10 figure 4. maximum power dissipation vs. temperature for a 4-layer board esd caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although this product features proprietary esd protection circuitry, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd pr ecautions are recommended to avoid performance degradation or loss of functionality.
ada4310-1 rev. 0 | page 6 of 16 pin configurations and function descriptions nc = no connect +v s 1 nc 2 out a 3 ?in a 4 +in a 5 out b 10 ?in b 9 +in b 8 pd1 7 pd0 6 06027-001 figure 5. 10-lead ms op pin configuration nc = no connect 1 nc 2 ? in a 3 +in a 4 gnd 11 ? in b 12 nc 10 +in b 9pd1 5 n c 6 n c 7 ? v s 8 p d 0 1 5 n c 1 6 o u t a 1 4 + v s 1 3 o u t b 06027-002 figure 6. 16-lead lfcsp pin configuration table 4. 10-lead msop pin function description pin no. mnemonic description 1 +v s positive power supply input 2 nc no connection 3 out a amplifier a output 4 ?in a amplifier a inverting input 5 +in a amplifier a noninverting input 6 pd0 power dissipation control 7 pd1 power dissipation control 8 +in b amplifier b noninverting input 9 ?in b amplifier b inverting input 10 out b amplifier b output 11 (exposed paddle) gnd ground (electrical connection required) table 5. 16-lead lfcsp pin function description pin no. mnemonic description 1, 5, 6, 12, 15 nc no connection 2 ?in a amplifier a inverting input 3 +in a amplifier a noninverting input 4 gnd ground 7 ?v s negative power supply input 8 pd0 power dissipation control 9 pd1 power dissipation control 10 +in b amplifier b noninverting input 11 ?in b amplifier b inverting input 13 out b amplifier b output 14 +v s positive power supply input 16 out a amplifier a output 17 (exposed paddle) gnd ground
ada4310-1 rev. 0 | page 7 of 16 typical performance characteristics 06027-022 frequency (mhz) normalized gain (db) ?18 ?12 ?9 ?6 ?3 0 3 12 1 10 100 1000 ?15 g = +2 g = +10 g = +20 9 6 g = +5 v out = 100mv p-p r l = 50 ? pd1, pd0 = 0, 0 figure 7. small signal frequency response for various closed-loop gains 06027-021 frequency (mhz) gain (db) ?10 ?7 ?4 ?1 2 5 8 11 20 23 1 10 100 1000 pd1, pd0 = 0, 0 pd1, pd0 = 0, 1 pd1, pd0 = 1, 0 17 14 v out = 100mv p-p g = +5 r l = 50 ? figure 8. small signal frequency response for various modes frequency (mhz) magnitude (k ? ) phase (degrees) 0.1 1 10 100 1000 10000 100000 0.0001 0.001 0.01 0.1 1 10 100 1000 ?270 ?225 ?180 ?135 ?90 ?45 0 r l = 100 ? 06027-013 figure 9. open-loop transimpedance gain and phase vs. frequency 06027-023 frequency (mhz) harmonic distortion (dbc) ?120 ?100 ?90 ?80 ?70 ?60 ?50 ? 20 0.1 1 10 100 ?110 ?30 ?40 v out = 2v p-p r l = 50 ? g = +5 pd1, pd0 = 0, 0 pd1, pd0 = 0, 1 pd1, pd0 = 1, 0 hd2 hd3 figure 10. harmonic distortion vs. frequency 1 10 100 frequency (hz) voltage noise (nv/ hz) 10 100 1k 10k 100k 1m 10m 100m 1g 06027-012 figure 11. voltage noise vs. frequency 06027-020 output (v) ?0.20 ?0.15 ?0.10 ?0.05 0 0.05 0.10 0.15 0.20 g = +5 r l = 50 ? 10ns/div figure 12. small signal transient response
ada4310-1 rev. 0 | page 8 of 16 common-mode rejection (db) ?70 ?50 ?40 ?30 ?20 0 ?60 ?10 frequency (mhz) 0.01 0.1 1 10 100 1000 pd1, pd0 = (0, 0) r l = 100 ? 0 6027-007 figure 13. common-mode rejection(cmr) vs. frequency ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 ?psr +psr frequency (mhz) power supply rejection (db) 0.01 0.1 1 10 100 1000 g = +5 pd1, pd0 = (0, 0) r l = 100 ? 06027-006 figure 14. power supply reje ction(psr) vs. frequency frequency (mhz) output impedance ( ? ) 0.01 0.1 1 10 100 0.1 1 10 100 1000 0 6027-009 pd1, pd0 = (0, 0) figure 15. closed-loop outp ut impedance vs. frequency frequency (mhz) feedthrough (db) ?120 ?100 ?80 ?60 ? 40 1 10 100 1000 pd1, pd0 = (1,1) 06027-010 figure 16. off-isol ation vs. frequency output impedance (k ? ) 0.001 1000 frequency (mhz) 0.01 0.1 1 10 100 1000 0.01 0.1 1 10 100 06027-008 pd1, pd0 = (1,1) figure 17. output impedanc e vs. frequency (disabled) voltage (v) ?0.5 0 0.5 1.0 1.5 2.0 2.5 v out v pd0 , v pd1 06027-011 10ns/div figure 18. power-down turn on/turn off
ada4310-1 rev. 0 | page 9 of 16 frequency (mhz) ?120 ?100 ?80 ?60 ?40 ?20 0 crosstalk (db) 0.1 1 10 100 1000 06027-014 figure 19. crosstalk
ada4310-1 rev. 0 | page 10 of 16 theory of operation the ada4310-1 is a current feedback amplifier with high output current capability. with a current feedback amplifier, the current into the inverting input is the feedback signal, and the open-loop behavior is that of a transimpedance, dv o /di in or t z . the open-loop transimpedance is analogous to the open-loop voltage gain of a voltage feedback amplifier. figure 20 shows a simplified model of a current feedback amplifier. because r in is proportional to 1/g m , the equivalent voltage gain is just t z g m , where g m is the transconductance of the input stage. basic analysis of the follower with gain circuit yields () () fin z z in o rrgst st g v v ++ = where: g f r r g += 1 50 1 = m in g r because g r in << r f for low gains, a current feedback amplifier has relatively constant bandwidth vs. gain, the 3 db point being set when |t z | = r f . of course, for a real amplifier there are additional poles that contribute excess phase, and there is a value for r f below which the amplifier is unstable. tolerance for peaking and desired flatness determines the optimum r f in each application. 06027-017 r f v out r g r n v in r in i in t z figure 20. simplified block diagram
ada4310-1 rev. 0 | page 11 of 16 application information feedback resistor selection the feedback resistor has a direct impact on the closed-loop bandwidth and stability of the current feedback op amp. reducing the resistance below the recommended value can make the amplifier response peak and even become unstable. increasing the size of the feedback resistor beyond the recom- mended value reduces the closed-loop bandwidth. tabl e 6 provides a convenient reference for quickly determining the feedback and gain resistor values, and the corresponding bandwidth, for common gain configurations. the recommended value of feedback resistor for the ada4310-1 is 499 . table 6. recommended values and frequency performance 1 gain r f () r g () ?3 db ss bw (mhz) +2 499 499 230 +5 499 124 190 +5 1k 249 125 +10 499 55.4 160 +20 499 26.1 115 1 conditions: v s = 6 v, t a = 25c, r l = 50 , pd1, pd0 = 0,0. power control modes of operation the ada4310-1 features four power modes: full power, ? power, ? power, and shutdown. the power modes are controlled by two logic pins, pd0 and pd1. the power-down control pins are compatible with standard 3 v and 5 v cmos logic. tabl e 7 shows the various power modes and associated logic states. in the power-down mode, the output of the amplifier goes into a high-impedance state. table 7. power modes pd1 pd0 power mode total supply current (ma) output impedance low low full power 15.2 low low high ? power 11.2 low high low ? power 7.8 low high high power down 1.3 high exposed thermal pad connections the exposed thermal pad on the 10-lead msop package is both the reference for the pd pins and the only electrical connection for the negative supply voltage. therefore, in the 10-lead msop package, the ada4310-1 can only be used on a single supply. the exposed thermal pad must be connected to ground. failure to do so will render the part inoperable. the 4 mm 4 mm 16-lead lfcsp package has dedicated pins for both the positive and negative supplies, and it can be used in either single supply or dual supply applications. there is no electrical connection for the exposed thermal pad. although the pad could theoretically be connected to any potential, it is still typically connected to ground. a requirement for both packages is that the thermal pad be connected to a solid plane with low thermal resistance, ensuring adequate heat transfer away from the die and into the board. power line application applications (that is, powerline av modems) requiring greater than 10 dbm peak power should consider using an external line driver, such as the ada4310-1. figure 21 shows an example interface between the txdac? output and ada4310-1 biased for single-supply operation. the txdacs peak-to-peak differ- ential output voltage swing should be limited to 2 v p-p, with the ada4310-1s gain configured to realize the additional voltage gain required by the application. a low-pass filter should be considered to filter the dac images inherent in the signal reconstruction process. in addition, dc blocking capacitors are required to level-shift the txdacs output signal to the common-mode level of the ada4310-1 (that is, avdd/2). 06027-019 0.1f r set r e f i o ioutp+ ioutp? 0db to ?7.5db optional lclpf avdd/2 t x d i s a b l e ada4310-1 ada4310-1 1/2 1/2 refadj txdac figure 21. txdac output directly via center-tap transformer
ada4310-1 rev. 0 | page 12 of 16 board layout as is the case with all high speed applications, careful attention to printed circuit board layout details prevents associated board parasitics from becoming problematic. proper rf design technique is mandatory. the pcb should have a ground plane covering all unused portions of the component side of the board to provide a low impedance return path. removing the ground plane on all layers from the area near the input and output pins reduces stray capacitance, particularly in the area of the inverting inputs. signal lines connecting the feedback and gain resistors should be as short as possible to minimize the inductance and stray capacitance associated with these traces. termination resistors and loads should be located as close as possible to their respective inputs and outputs. input and output traces should be kept as far apart as possible to minimize coupling (crosstalk) though the board. wherever there are complementary signals, a symmetrical layout should be provided to the extent possible to maximize balanced performance. when running differential signals over a long distance, the traces on the pcb should be close. this reduces the radiated energy and makes the circuit less susceptible to rf interference. adherence to stripline design techniques for long signal traces (greater than about 1 inch) is recommended. for more information on high speed board layout, go to www.analog.com and a practical guide to high-speed printed- circuit-board layout. power supply bypassing the ada4310-1 operates on supplies, from +5 v to 6 v. the ada4310-1 circuit should be powered with a well-regulated power supply. careful attention must be paid to decoupling the power supply. high quality capacitors with low equivalent series resistance (esr), such as multilayer ceramic capacitors (mlccs), should be used to minimize supply voltage ripple and power dissipation. in addition, 0.1 f mlcc decoupling capacitors should be located no more than ?-inch away from each of the power supply pins. a large, usually tantalum, 10 f capacitor is required to provide good decoupling for lower frequency signals and to supply current for fast, large signal changes at the ada4310-1 outputs. bypassing capacitors should be laid out in such a manner to keep return currents away from the inputs of the amplifiers. this minimizes any voltage drops that can develop due to ground currents flowing through the ground plane. a large ground plane also provides a low impedance path for the return currents.
ada4310-1 rev. 0 | page 13 of 16 outline dimensions compliant to jedec standards mo-187-ba-t 0.23 0.08 0.80 0.60 0.40 8 0 0.15 0.00 0.33 0.17 0.95 0.85 0.75 seating plane 1.10 max 10 6 5 1 0.50 bsc 3.00 bsc 3.00 bsc 4.90 bsc pin 1 coplanarity 0.10 top view bottom view exposed pad sq 2.50 0.75 figure 22. 10-lead mini small outline package with exposed pad [mini_so_ep] (rh-10) dimensions shown in millimeters compliant to jedec standards mo-220-vggc 2 . 2 5 2 . 1 0 s q 1 . 9 5 16 5 13 8 9 12 1 4 1.95 bsc pin 1 indicator top view 4.00 bsc sq 3.75 bsc sq coplanarity 0.08 exposed pa d (bottom view) 12 max 1.00 0.85 0.80 seating plane 0.35 0.30 0.25 0.80 max 0.65 typ 0.05 max 0.02 nom 0.20 ref 0.65 bsc 0.60 max 0.60 max pin 1 indicator 0.25 min 010606-0 0.75 0.60 0.50 figure 23. 16-lead lead frame chip scale package [lfcsp_vq] 4 mm 4 mm body, very thin quad (cp-16-4) dimensions shown in millimeters ordering guide model temperature package package description package option branding ada4310-1arhz-rl 1 ?40c to +85c 10-lead mini small outline package with exposed pad [mini_so_ep] rh-10 0l ADA4310-1ARHZ-R7 1 ?40c to +85c 10-lead mini small outline package with exposed pad [mini_so_ep] rh-10 0l ada4310-1arhz 1 ?40c to +85c 10-lead mini small outline package with exposed pad [mini_so_ep] rh-10 0l ada4310-1acpz-rl 1 ?40c to +85c 16-lead lead frame chip scale package [lfcsp_vq] cp-16-4 ada4310-1acpz-r2 1 ?40c to +85c 16-lead lead frame chip scale package [lfcsp_vq] cp-16-4 ada4310-1acpz-r7 1 ?40c to +85c 16-lead lead frame chip scale package [lfcsp_vq] cp-16-4 1 z = pb-free part.
ada4310-1 rev. 0 | page 14 of 16 notes
ada4310-1 rev. 0 | page 15 of 16 notes
ada4310-1 rev. 0 | page 16 of 16 notes ?2006 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d06027-0-10/06(0)

▲Up To Search▲

Price & Availability of ADA4310-1ARHZ-R7

	To Download ADA4310-1ARHZ-R7 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .